Job Title: FPGA Engineer III (Job Ref# 26698343)
Duration: 12 months+ project (possibly extended)
Location: Cupertino, CA (Hybrid)
No. of positions: 1
Pay Rate on W2 Hourly: $71/hr+ MindSource benefits
The organization's Display Engineering Team is looking for an energetic, creative, and self driven FPGA Engineer to work on future Display hardware technologies. The candidate will work in a collaborative, exciting environment to integrate new technologies into organization products.
Working with multiple cross-functional teams (e.g. EE, Firmware, Optical) to balance design tradeoffs
Designing logic with FPGAs (Xilinx / Client) – preferably on consumer hardware/software products.
Proficient in Verilog, System Verilog language
Developing AXI, AXI stream, and APB-based modules desired
Writing test benches to validate RTL implementations in simulation
Writing scripts (i.e. Python or C) to validate RTL implementations on the bench
Perform FPGA Synthesis, Place & Route, timing optimizations
Experience with industry standard protocols such as DisplayPort, PCIe, MIPI, Ethernet, DDR4/3 etc
Experience working with systems that include analog sensors, ADCs, FPGAs, embedded microcontrollers
Hands-on bringup and debug of PCBs that have standard digital interfaces (e.g. SPI, I2C, LVDS, DDR)
Using standard lab equipment (e.g. multimeters, oscilloscopes, spectrum analyzers) along with FPGA tools such as Chipscope / SignalTap etc
Able to read board schematics and know EE fundamentals.
Firmware development using C/C++ programming language.
Version control systems such as Git, Perforce.
Promote innovation and new technology to further enhance company's display performance and user experience.
Create and give presentations before and after prototyping new ideas.
Communicate and demonstrate prototypes to Cross-Functional Teams.
Demonstrate creativity in problem solving and adapt quickly to new technical areas.
As an FPGA Engineer, you will have the following responsibilities:
Architect, design, implement, and validate FPGA RTL to enable prototype systems that drive display subsystem.
Collaborate with cross-functional teams to define RTL specs and plan feature development roadmaps
Work closely with software team to write low-level drivers that interface with RTL
Drive major aspects of hardware bring up, characterization, and debug in collaboration with other EEs
Guide and mentor junior engineers to encourage technical growth and maintain organization's high standards
MS with 7+ years, or BS with 9+ years of relevant FPGA experience.
Job Ref# 23-00686
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